“The chip combines the low latency of SRAM-first designs with the long-context support of HBM,” MatX co-founder and Chief ...

MatX raises $500M to develop AI chips for large language models and compete with Nvidia, enabling advanced applications.

Researchers at NYU Tandon School of Engineering have created VeriGen, the first specialized artificial intelligence model successfully trained to generate Verilog code, the programming language that ...

The proliferation of edge AI will require fundamental changes in language models and chip architectures to make inferencing and learning outside of AI data centers a viable option. The initial goal ...

ISSCC addressed challenges for electronics to meet AI demand, AI to speed up the design and training the next generation ...

As large language models (LLMs) gain momentum worldwide, there’s a growing need for reliable ways to measure their performance. Benchmarks that evaluate LLM outputs allow developers to track ...

Researchers at UCSD and Columbia University published “ChipBench: A Next-Step Benchmark for Evaluating LLM Performance in AI-Aided Chip Design.” “While Large Language Models (LLMs) show significant ...

The government-led artificial intelligence (AI) foundation model project is intensifying its race as the four consortia in ...

As AI chips hit overdrive in data centers and devices, the biggest headlines often go to a handful of front-line names. Yet a broader ecosystem of chip designers, tool makers, and software specialists ...