The purpose of a phase locked loop (PLL) is to generate a frequency and phase-locked output oscillation signal. To achieve this goal, prior art essentially functioned ...

As clock speeds and communication channels run at ever higher frequencies, engineers who have previously had little need to consider clock jitter and phase noise are finding that they need to increase ...

[Kenneth Finnegan] put up a lengthy primer on PLLs (Phase-Locked Loops). We really enjoyed his presentation (even the part where he panders to Rigol for a free scope… sign us up for one of those too).