IEEE

A Novel HDL Code Generator for Effectively Testing FPGA Logic Synthesis Compilers

Abstract: Field programmable gate array (FPGA) logic synthesis compilers (e.g., Vivado, Iverilog, Yosys, and Quartus) are widely applied in electronic design automation (EDA), such as the development ...
IEEE

A Data-Efficient Deep Reinforcement Learning Algorithm and FPGA Accelerator for Real-Time Robot Motion Control Applications

Abstract: Deep reinforcement learning (DRL) has revolutionized end-to-end self-learning in most AI tasks, but existing algorithms like Proximal Policy Optimization (PPO) suffer from data inefficiency ...